Siemens Questa One: Redefining AI-Driven Verification in EDA

The semiconductor industry stands at a crossroads where the growing complexity of SoC designs demands not only faster verification but also smarter verification. Into this space, Siemens EDA has officially launched Questa One — a comprehensive, AI-infused verification platform designed to transform the simulation landscape.

While some might say Siemens arrived late to the simulation+AI revolution, the real story reveals a different truth — one of deliberate strategy, technical depth, and readiness for enterprise-scale adoption.

From Caution to Confidence: Why Siemens Took Its Time

In 2023, Siemens introduced Verification IQ, marking its initial step into AI-driven verification. But with the announcement of Questa One in May 2025, Siemens has unveiled a complete and cohesive platform — not a set of point tools, but an integrated ecosystem built from the ground up.

According to Abhi Kolpekwar, VP and GM at Siemens EDA, this wasn’t about being first. It was about being fully prepared. Siemens chose a path of careful development, real-world testing, and strategic endorsements before making its move public. Now, with its suite fully formed and major industry names already onboard, Siemens is signaling its intent to lead.

Inside Questa One: AI, Performance, and Unified Verification

Questa One represents a complete rewrite and consolidation of the Questa platform. It unifies simulation across multiple domains — functional, fault, RTL, gate-level, coverage, acceleration, profiling — all through a single install, a shared interface, and an integrated debug experience.

This new architecture is complemented by a host of AI-powered tools and extensions:

Property Assist

Uses generative AI to automatically generate assertions from natural language descriptions. This not only accelerates assertion creation but ensures better coverage and early bug detection.

Docs Assist

Automatically generates documentation from current design collateral — reducing manual effort and maintaining alignment between code and documentation.

PSS Assist, Testplan Assist, and Code Assist

These AI features assist in generating PSS scenarios, converting natural language test plans into executable tests, and generating RTL code snippets, respectively. These capabilities are designed to support faster design bring-up and efficient test creation.

Smart Regression with ViQ

The Verification IQ engine orchestrates regression runs using intelligent test prioritization. It predicts which tests are most likely to fail and runs them first, optimizing compute grid usage and reducing regression times.

Predictive Debug and Navigation

Early adopters are using Questa One for advanced debug workflows such as bad commit prediction, root cause identification, and signature-based failure prediction.

QCX – Predictive Coverage Acceleration

This feature focuses on eliminating redundant tests that contribute little to functional coverage, potentially speeding up coverage closure by up to 50X — a significant performance advantage in production-scale environments.

Smart Debug and Protocol Assist

Questa One correlates failures with recent commits and generates failure signatures to identify recurring issues. Protocol Assist extends these capabilities to protocol-level debugging using Questa One Avery VIP.

Smart Analysis

Leverages unsupervised machine learning to detect coverage holes, correlate coverage gaps to potential weaknesses in test plans, and identify RTL design patterns contributing to undercoverage.

Real-World Validation: Industry Endorsements

Siemens EDA’s rollout of Questa One includes notable endorsements from leading technology companies — validating both the platform’s maturity and its real-world impact:

• Arm reports improved performance, cost-efficiency, and reduced regression times across AArch64 architectures using Questa One Sim.

• MediaTek highlights time savings of weeks using Property Assist and several days using Regression Navigator.

• Rambus leverages the full Questa One suite for PCIe, HBM, and CXL verification, enhancing confidence in its SoC and chiplet designs.

• Microsoft notes significant speed-ups in DFT-centric simulations and a 20% additional performance boost on Azure Cobalt 100 infrastructure.

These endorsements reflect tangible ROI — from faster simulation to better test coverage and smarter verification cycles.

Conclusion: A Platform Built for the Next Decade

With Questa One, Siemens is not simply adding AI to an existing tool — it is reshaping how chip verification will be done in the AI era. This launch brings together a full spectrum of capabilities: simulation, formal and static analysis, regression optimization, and AI-powered debug — all tightly integrated under a single platform.

For engineering teams facing the challenge of verifying ever more complex chips under tight timelines, Questa One delivers a compelling proposition: higher performance, deeper insight, and greater automation — all designed for the future of design verification.

Source - Semiwiki